The present invention relates generally to pulse width modulation techniques, and more particularly to pulse width modulation methods and apparatuses for use in various devices.
In the past, pulse width modulation techniques have been used in the context of control signal generation and also for electronic converters/inverters. Such converters/inverters tend to employ square-wave switching waveforms, wherein the pulse width is varied in order to control a load voltage. Such techniques have also been employed, for example, in the design/fabrication of integrated circuits (ICs) having pulse width modulators (PWMs).
One conventional technique for implementing a PWM utilizes a design solution wherein the PWM is run with a much higher clock frequency to generate the desired signal pulse widths and pulse justifications. The required clock frequency for a PWM is typically proportional to the resolution, or granularity, of the pulse widths that can be generated. Thus, for example, where pulse widths ranging from 0 to 64 can be specified, in increments of {fraction (1/64)}th of the output period, many conventional solution techniques would require a clock frequency that is 64 times the clock frequency. Consequently, the resulting clock frequencies could exceed 1 GHz, which is often very difficult/expensive to implement in a conventional IC.
Another conventional technique for implementing a PWM utilizes an analog voltage ramp circuit to calculate periods of time. The resulting circuit requires calibration of the ramp circuit to a desired frequency. A desired pulse width number, or value, is converted to a voltage value for the ramp reference voltage. The voltage value is proportional to the pulse width. A pulse is initiated when the voltage ramp begins, and ends when the ramp voltage reaches the reference voltage. Here, the reference voltage is generated from the pulse width input using a digital-to-analog converter (DAC). Such designs require only the clock frequency to drive the control logic. However, such designs also require sensitive analog circuitry typically cannot be implemented in a digital-only IC. Currently, digital-only ICs tend to be the least expensive type of ICs to manufacture. Mixed analog and digital ICs are generally more expensive and more difficult to design and fabricate.
Therefore, there exists a need for an improved PWM that can be implemented on an IC as well as other types of circuits in a manner that is efficient in operation, cost-effective, and/or substantially accurate.
Improved pulse width modulation methods and apparatuses are provided that can be implemented in an IC as well as other types of circuits.
The above stated needs and others are met, for example, by an improved pulse width modulator (PWM) circuit, in accordance with certain exemplary implementations of the present invention. The improved PWM circuit includes a selective synchronization circuit that is configured to receive vector signals, and output corresponding synchronized vector signals. The PWM further includes a tap selection circuit that is coupled to the selective synchronization circuit and configured to receive the synchronized vector signals and in response output selected timing signals that can be logically combined to produce a desired pulse width modulated signal.